Proceedings: The Second NASA/DoD Workshop on Evolvable Hardware : Palo Alto, California, USA, July 13-15, 2000Jason D. Lohn The 28 papers focus on real-world applications of evolvable hardware, defined as an emerging field that applies simulated evolution to the design and adaptation of physical structures, particularly electronic systems, itself descended from the cybernetics movement of the 1940s. Among the topics are |
Contents
Use of Conditional Developmental Operators and Free Variables in Automatically Synthesizing | 5 |
A Fast Evolutionary Algorithm | 17 |
Genetic Programming of Process Decomposition Strategies for Evolvable Hardware 25 | 25 |
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analog analog circuits antibody cells applications architecture artificial automatically Biology to Hardware bits building blocks calibration cellular chip chromosome circuit evolved CMOS complex components Computer Science Conference on Evolvable configuration connected crossover cuit defined devices digital circuits editors embryonic evolutionary algorithm Evolutionary Computation Evolvable Hardware Evolvable Systems evolved circuits example extra columns faults filter fitness evaluation fitness function FPGA frequency genes genetic algorithm Genetic Programming genome genotype IEEE implemented incremental evolution individual International Conference Koza logic gates memory method molecule MoveLine multiplexer mutation NASA/DoD Workshop neural networks neurons nodes Notes in Computer operation optimization output parameters pattern performance population problem Proceedings random reconfigurable resistors robot module robustness self-repair shown in Figure Simulated Annealing simulation solution sorting networks spiketrains Springer-Verlag sub-systems subtree target techniques test vector three-bit multiplier tion truth table two-input gates voltage Workshop on Evolvable Xilinx