Proceedings, Volumes 1-2IEEE, 1999 - Artificial intelligence |
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Page 489
... stage is analyzed through a chain of different processing stages , as depicted in figure 3. These stages deal with different data types ( e.g. images , feature patterns , etc. ) of different sizes ( e.g. different image sizes or pixel ...
... stage is analyzed through a chain of different processing stages , as depicted in figure 3. These stages deal with different data types ( e.g. images , feature patterns , etc. ) of different sizes ( e.g. different image sizes or pixel ...
Page 568
... stage : pulse emission train and echo reflected ( a ) , echo envelope and reception threshold ( b ) , and envelope and stage output signal along the period between pulse trains ( c ) . • A counter stage , that works from the beginning ...
... stage : pulse emission train and echo reflected ( a ) , echo envelope and reception threshold ( b ) , and envelope and stage output signal along the period between pulse trains ( c ) . • A counter stage , that works from the beginning ...
Page 763
... stage . 600 200 200 500 1000 ao 00 Sat Paint Current Point PID Simulation 00 Identification Current 0.0 05 Relieve ... stage of the cycle , in a main panel , GUIS and routines for development and analysis of each stage are selected . All ...
... stage . 600 200 200 500 1000 ao 00 Sat Paint Current Point PID Simulation 00 Identification Current 0.0 05 Relieve ... stage of the cycle , in a main panel , GUIS and routines for development and analysis of each stage are selected . All ...
Contents
Java RealTime Distributed Processing Over ATM Networks with ChorusOS | 3 |
Optimizing Costs and Processing Times Under Variable External Processing | 4 |
A Petri Net Solution to the Problem of Deadlocks in Systems of Processes With | 8 |
Copyright | |
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action activity actuators adaptive agent algorithm APDU applet application architecture Automation behavior byte camera client components Computer Vision configuration constraints control system CORBA cost defined described detected developed devices distributed dynamic environment error example execution feature Figure filter FPGA function fuzzy Genetic Algorithms graph hardware IEEE implementation industrial initial input integrated interface Java JavaCard laser Lonworks machine manipulator manufacturing system marked graph matrix method mobile robot module monitoring neural network nodes object obstacle obtained OpenCard Framework operations optimal output parameters PC/SC performance Petri net pixel position problem proposed real-time reinforcement learning rules scheduling sensor sequence server signal simulation smart card solution strategy structure Sun Microsystems task techniques terminal application tool trajectory transducers transition ultrasonic variables vector virtual visual VRML workflow