The Essentials of Computer Organization and ArchitectureThoroughly Revised And Updated, The Essentials Of Computer Organization And Architecture, Second Edition Is A Comprehensive Resource That Addresses All Of The Necessary Organization And Architecture Topics Yet Is Concise Enough To Move Through In A Single Semester. The Text Covers Such Topics As Digital Logic, Data Representation, Machine-Level Language, General Organization, Assembly Language Programming, CPU Organization, Memory Organization, And Input/Output Devices, As Well As A New Chapter On Embedded Systems. Correlated To The ACM-IEEE Computing Curricula Guidelines, The Essentials Of Computer Organization And Architecture Is The Forefront Text For Your Computer Organization And Architecture Course. |
Contents
CHAPTER Introduction | 1 |
CHAPTER Data Representation in Computer Systems | 39 |
3 | 40 |
5 | 63 |
6 | 74 |
7 | 81 |
Chapter Summary | 91 |
Focus on Codes for Data Recording and Transmission | 100 |
7 | 353 |
8 | 359 |
RAID Level 3 | 367 |
Chapter Summary | 377 |
Focus on Data Compression | 384 |
7A 6 | 403 |
CHAPTER System Software | 407 |
CHAPTER Alternative Architectures | 461 |
Exercises | 107 |
3 | 118 |
6 | 126 |
7 | 140 |
Designing Circuits | 151 |
Focus on Karnaugh Maps | 163 |
An Introduction to a Simple Computer | 177 |
5 | 228 |
CHAPTER A Closer Look at Instruction Set Architectures | 243 |
CHAPTER Memory | 281 |
CHAPTER InputOutput and Storage Systems | 327 |
CHAPTER Topics in Embedded Systems | 505 |
CHAPTER Performance Measurement and Analysis | 541 |
CHAPTER Network Organization and Architecture | 591 |
CHAPTER Selected Storage Systems and Interfaces | 669 |
APPENDIX Data Structures and the Computer | 695 |
A 3 | 700 |
Glossary | 715 |
Answers and Hints for Selected Exercises | 757 |
| 773 | |
Common terms and phrases
addressing modes algorithm allow architecture arithmetic array assembly language associative cache benchmark binary numbers Boolean bytes cache block called Chapter chip circuit clock cycle code word compiler components computer organization computer system decimal decoder devices EBCDIC embedded systems encoding error example execution Fibre Channel field floating-point function hardware IEEE implemented input instruction set integer Intel interface Internet Java layer Load logic loop machine main memory main memory address mapping method MIPS modules multiple node number of bits one's complement opcode operands operating system output page table parallel parity Pentium performance physical address pipeline processor protocol result RISC Router SCSI shown in Figure signal significand specific speed stack storage stored superscalar switches tion transistors truth table two's complement types virtual address virtual memory zero